将杂乱可编程逻辑器材（CPLDs）应用于需求严厉功率预算的体系变得越来越遍及。例如：智能手机、手持外表、录像设备和导航设备。虽然一些“零功耗”CPLDs待机时的功耗能够微安核算，但这些设备满意不了一些特别规划的要求。在这种情况下，电动自行车规划人员有必要供给一个可行的计划去完成低功耗。
负载循环中功耗削减是有现实根据的，这个现实便是大多数现在的设备一般很少用CPLD处理需求。例如：CPLD能够扫描键盘，看看要害通讯是否现已产生，或许等候串行接口上的一些衔接信号。
CPLDs向一切的集成电路相同，不论运转与否都会因为设备的倾向和走漏然后产生功耗。并且设备内信号的开关CPLDs也会产生功耗。这个功耗叫做动态功耗。
动态功耗与完成的处理程序数量是成正比的。因而，0.1秒、100MHz时完成操作的功耗与在10秒、1MHz完成操作所需功耗简直是相同的。
经过在短的时刻范围内防止活动的要求和在休止的时分关掉CPLD的办法，动态和静态功耗的这些特色能够把规划的功耗降到最低。
1.1负载循环办法概述
For the duty cycle approach to work, the power up and down time of the CPLD clearly needs to be brief compared with the frequency at which the CPLD must be activated in order to achieve the desired processing and system response time.为占空比作业办法，功率和时刻的CPLD完成明显需求很简略的频率比较，在这次会议上CPLD的有必要发动，以到达抱负的加工和体系呼应时刻。 Fortunately, currently available CPLD devices utilize on-chip, non-volatile memory that yields power up and down times below 1 mS.走运的是，现有的根据CPLD器材运用片上非易失性存储器的产值权利向上和向下次低于1毫秒。 This allows CPLDs to be activated at frequencies up to the low hundreds of Hz while still yielding useful power savings due to the duty cycling approach.这使得CPLDs被激活频率达低几百赫兹一起还产生有利的省电因为作业地址骑自行车的办法。
Implementing the switch 履行开关
When implementing the duty cycle approach, it is necessary to engineer the design so that it is possible to turn the CPLD device on and off.当履行作业周期的办法，有必要的规划工程师，以便有可能把CPLD的设备和封闭。 There are several methods available to achieve this.有几种办法可完成这一方针。 However, the method chosen will be influenced by several factors.但是，挑选的办法将遭到几个要素的影响。 Key factors to consider include:要害要考虑的要素包含：
The number of power supplies the CPLD has.人数的CPLD的电力供应已。
What other devices, if any, share power supplies with the device.还有哪些其他设备，如果有的话，同享电源设备。
Whether devices sharing the same power supply rail can be duty cycled.无论是设备同享相同的电力供应铁路可免税循环。
The controls available within the power supply subsystem for disabling power supplies在操控范围内现有的电源子体系禁用电源
There are three primary methods that can be considered when implementing duty cycling of the CPLD.有三个首要办法，能够被视为履行职责时，骑自行车的CPLD完成。 The advantages and disadvantages of each method are described below.的长处和缺陷每个办法介绍如下。
Use Power Supply Disable on the Voltage Regulator Module (VRM) : Many designs use VRMs to provide power to the chips within the design, and often these modules have a power enable/disable input signal that can be used to duty cycle the CPLD. 电源运用禁用的电压调节器模块（ VRM ） ：许多规划运用VRMs供给电力的芯片的规划，并且往往是这些模块的电源启用/禁用输入信号，可用于占空比的可编程逻辑器材。 The advantage of this approach is its relative simplicity.这种办法的长处是其相对简略。 One disadvantage of this approach is its course grained nature, requiring all devices that are fed by the particular module to be cycled on and off at the same time.一个缺陷是它的这种做法当然晶性质，要求一切设备，特别是美联储的模块循环和封闭在同一时刻。 The second disadvantage is that the time required to power down and power up the VRM reduces the frequency at which the duty cycling can occur.第二个缺陷是，所需求的时刻主动封闭电源和功率降低了VRM的频率税骑自行车，就可能产生。
Use FETs on the Power Lines to the CPLD(s) : In this approach FETs (Field Effect Transistors) are placed in the various power supply lines of the CPLD to be duty cycled. 运用场效应管的电力线路上的可编程逻辑器材（补） ：在这个办法场效应管（场效应晶体管）被安顿在各供电线路的CPLD完成的职责循环。 This approach has two key advantages.这种做法有两个要害优势。 First, it allows specific device(s) to be duty cycled.首要，它能够让特定设备（县）的作业地址循环。 Second, the power can be turned on and off very rapidly, which allows the device to be duty cycled at a higher frequency.第二，权利能够敞开和封闭十分敏捷，这使得该器材成为职责循环在更高的频率。 The disadvantage of this approach is that additional devices are required on the circuit board, driving up cost and board area.这种办法的缺陷是，需求额定的设备上的电路板，推高的本钱和电路板面积。
Use CPLD Sleep-Pin Functionality : An increasing number of PLDs, such as Lattice’s MachXO family, incorporate a sleep pin that allows the device to be disabled and the static power consumption reduced to almost zero. 运用CPLD的睡觉引脚功用 ：越来越多的可编程逻辑器材，如Lattice的MachXO家庭，纳入了“睡觉引脚”使设备被禁用和静态功耗降低到简直为零。 This functionality can be used to implement duty cycling.这项功用能够用来履行职责骑自行车。 With this approach, only the specific CPLD is duty cycled and the turn on and off times allow for a high frequency of duty cycling.用这个办法，只要详细的CPLD的是骑自行车和职责翻开和封闭时刻答应高频作业地址骑自行车。 This approach also uses minimal components, saving cost and board area.这种办法还运用最少的元件，节约本钱和电路板面积。
Page 2: next page 第2页： 下一页
