/*
*Header file for the Microchip
*PIC 16F873A chip
*PIC 16F874A chip
*PIC 16F876A chip
*PIC 16F877A chip
*Midrange Microcontroller
*/
#if defined(_16F874A)|| defined(_16F877A)
#define__PINS_40
#endif
static volatile unsigned charINDF@ 0x00;//直接寻址寄存器
static volatile unsigned charTMR0@ 0x01;//守时器0
static volatile unsigned charPCL@ 0x02;//低8位程序计数器
static volatile unsigned charSTATUS@ 0x03;//程序状况寄存器
static unsigned charFSR@ 0x04;//特别功用寄存器
static volatile unsigned charPORTA@ 0x05;//端口A寄存器
static volatile unsigned charPORTB@ 0x06;//端口B寄存器
static volatile unsigned charPORTC@ 0x07;//端口C寄存器
#ifdef __PINS_40
static volatile unsigned charPORTD@ 0x08;//端口D寄存器
static volatile unsigned charPORTE@ 0x09;//端口E寄存器
#endif
static unsigned charPCLATH@ 0x0A;//高5位程序计数器
static volatile unsigned charINTCON@ 0x0B;//中止操控寄存器
static volatile unsigned charPIR1@ 0x0C;//中止标志寄存器PIR1
static volatile unsigned charPIR2@ 0x0D;//中止标志寄存器PIR2
static volatile unsigned charTMR1L@ 0x0E;//低字节计数寄存器
static volatile unsigned charTMR1H@ 0x0F;//高字节计数寄存器
static volatile unsigned charT1CON@ 0x10;//TMR1操控寄存器
static volatile unsigned charTMR2@ 0x11;//守时/计数器TMR2
static volatile unsigned charT2CON@ 0x12;//TMR2操控寄存器
static volatile unsigned charSSPBUF@ 0x13;//收/发数据缓冲器
static volatile unsigned charSSPCON@ 0x14;//同步串口操控寄存器，对MSSP模块的功用和目标进行设置和界说。
static volatile unsigned charCCPR1L@ 0x15;//捕获/比较/PWM寄存器低字节
static volatile unsigned charCCPR1H@ 0x16;//捕获/比较/PWM寄存器低字节
static volatile unsigned charCCP1CON@ 0x17;//CCP1CON寄存器
static volatile unsigned charRCSTA@ 0x18;//USART接纳操控兼状况寄存器
static volatile unsigned charTXREG@ 0x19;//USART产生缓冲器
static volatile unsigned charRCREG@ 0x1A;//USART接纳缓冲器
static volatile unsigned charCCPR2L@ 0x1B;//捕获/比较/PWM寄存器低字节
static volatile unsigned charCCPR2H@ 0x1C;//捕获/比较/PWM寄存器低字节
static volatile unsigned charCCP2CON@ 0x1D;//CCP2CON寄存器
static volatile unsigned charADRESH@ 0x1E;//ADC转化成果寄存器高字节
static volatile unsigned charADCON0@ 0x1F;//A/D转化器开关位。
/*bank 1 registers */
static unsigned char bank1OPTION@ 0x81;//挑选寄存器，用于装备TMR0/WDT预分频系数、外部INT中止、TMR0和端口B的弱上拉。
static volatileunsigned char bank1TRISA@ 0x85;//A口方向寄存器
static volatileunsigned char bank1TRISB@ 0x86;//B口方向寄存器
static volatileunsigned char bank1TRISC@ 0x87;//C口方向寄存器
#ifdef__PINS_40
static volatile unsigned char bank1TRISD@ 0x88;//D口方向寄存器
static volatile unsigned char bank1TRISE@ 0x89;//E口方向寄存器
#endif
static volatile unsigned char bank1PIE1@ 0x8C;//中止答应寄存器PIE1
static volatile unsigned char bank1PIE2@ 0x8D;//中止答应寄存器PIE2
static volatile unsigned char bank1PCON@ 0x8E;//电源操控状况寄存器
static volatile unsigned char bank1SSPCON2@ 0x91;//MSSP操控寄存器2
static volatile unsigned char bank1PR2@ 0x92;//TMR2周期寄存器
static volatile unsigned char bank1SSPADD@ 0x93;//同步串口地址寄存器
static volatile unsigned char bank1SSPSTAT@ 0x94;//同步串口状况寄存器
static volatile unsigned char bank1TXSTA@ 0x98;//USART产生操控兼状况寄存器
static volatile unsigned char bank1SPBRG@ 0x99;//USART波特率产生器初值寄存器
static volatile unsigned char bank1CMCON@ 0x9C;//比较操控寄存器
static volatile unsigned char bank1CVRCON@ 0x9D;//比较电压参阅操控寄存器
static volatile unsigned char bank1ADRESL@ 0x9E;//ADC转化成果寄存器低字节
static volatile unsigned char bank1ADCON1@ 0x9F;//ADC操控寄存器ADCON1
/*bank 2 registers */
static volatile unsigned char bank2EEDATA@ 0x10C;//EEPROM数据寄存器低字节
static volatile unsigned char bank2EEADR@ 0x10D;//EEPROM地址寄存器低字节
static volatile unsigned char bank2EEDATH@ 0x10E;//EEPROM数据寄存器高字节
static volatile unsigned char bank2EEADRH@ 0x10F;//EEPROM地址寄存器高字节
/*bank 3 registers */
static volatile unsigned char bank3EECON1@ 0x18C;//EEPROM操控寄存器1
static volatile unsigned char bank3EECON2@ 0x18D;//EEPROM操控寄存器2
//*STATUS bits状况寄存器*/
static volatile bitIRP @ (unsigned)&STATUS*8+7;//寄存器bank挑选位(用于直接寻址）。0:bank0,1;1:bank2,3
static volatile bitRP1 @ (unsigned)&STATUS*8+6;//寄存器bank挑选位(用于直接寻址）。PR1:PR0:00:BANK0;01:BANK1;10:BANK2;11BANK3.
static volatile bitRP0 @ (unsigned)&STATUS*8+5;//
static volatile bitTO@ (unsigned)&STATUS*8+4;//超时位。0：WDT超时产生；1：上电后，履行了CLRWDT或许SLEEP指令
static volatile bitPD@ (unsigned)&STATUS*8+3;//掉电标志位。0：履行完SLEEP指令；1：上电后或许履行CLRWDT指令
static volatile bitZERO @ (unsigned)&STATUS*8+2;//零标志位。0：算术或逻辑操作成果不为0；1：反之。
static volatile bitDC @ (unsigned)&STATUS*8+1;//数字进位/退位标志位。0：成果的低4位没有产生进位；1：反之。
static volatile bitCARRY @ (unsigned)&STATUS*8+0;//进位/退位标志位。0：成果的高4位没有产生进位；1：反之。
/* PORTA bits */
static volatile bitRA5@ (unsigned)&PORTA*8+5;//RA5
static volatile bitRA4@ (unsigned)&PORTA*8+4;//RA4
static volatile bitRA3@ (unsigned)&PORTA*8+3;//RA3
static volatile bitRA2@ (unsigned)&PORTA*8+2;//RA2
static volatile bitRA1@ (unsigned)&PORTA*8+1;//RA1
static volatile bitRA0@ (unsigned)&PORTA*8+0;//RA0
/* PORTB bits */
static volatile bitRB7@ (unsigned)&PORTB*8+7;//RB7
static volatile bitRB6@ (unsigned)&PORTB*8+6;//RB6
static volatile bitRB5@ (unsigned)&PORTB*8+5;//RB5
static volatile bitRB4@ (unsigned)&PORTB*8+4;//RB4
static volatile bitRB3@ (unsigned)&PORTB*8+3;//RB3
static volatile bitRB2@ (unsigned)&PORTB*8+2;//RB2
static volatile bitRB1@ (unsigned)&PORTB*8+1;//RB1
static volatile bitRB0@ (unsigned)&PORTB*8+0;//RB0
/* PORTC bits */
static volatile bitRC7@ (unsigned)&PORTC*8+7;//RC7
static volatile bitRC6@ (unsigned)&PORTC*8+6;//RC6
static volatile bitRC5@ (unsigned)&PORTC*8+5;//RC5
static volatile bitRC4@ (unsigned)&PORTC*8+4;//RC4
static volatile bitRC3@ (unsigned)&PORTC*8+3;//RC3
static volatile bitRC2@ (unsigned)&PORTC*8+2;//RC2
static volatile bitRC1@ (unsigned)&PORTC*8+1;//RC1
static volatile bitRC0@ (unsigned)&PORTC*8+0;//RC0
/* PORTD bits */
#ifdef__PINS_40
static volatile bitRD7@ (unsigned)&PORTD*8+7;//RD7
static volatile bitRD6@ (unsigned)&PORTD*8+6;//RD6
static volatile bitRD5@ (unsigned)&PORTD*8+5;//RD5
static volatile bitRD4@ (unsigned)&PORTD*8+4;//RD4
static volatile bitRD3@ (unsigned)&PORTD*8+3;//RD3
static volatile bitRD2@ (unsigned)&PORTD*8+2;//RD2
static volatile bitRD1@ (unsigned)&PORTD*8+1;//RD1
static volatile bitRD0@ (unsigned)&PORTD*8+0;//RD0
/* PORTE bits */
static volatile bitRE2@ (unsigned)&PORTE*8+2;//RE2
static volatile bitRE1@ (unsigned)&PORTE*8+1;//RE1
static volatile bitRE0@ (unsigned)&PORTE*8+0;//RE0
#endif
//*INTCON bits 中止操控寄存器*/
static volatile bitGIE@ (unsigned)&INTCON*8+7;//总中止使能位。0：屏蔽一切的中止请求；1：答应非屏蔽的中止。
static volatile bitPEIE@ (unsigned)&INTCON*8+6;//外部中止使能位。0：制止；1：使能
static volatile bitT0IE@ (unsigned)&INTCON*8+5;//TMR0溢出中止使能位。0：制止；1：使能
static volatile bitINTE@ (unsigned)&INTCON*8+4;//RB0/INT外部中止使能位。0：不使能；1：使能。
static volatile bitRBIE@ (unsigned)&INTCON*8+3;//RB端口改动中止时能位。0：不使能；1：使能。
static volatile bitT0IF@ (unsigned)&INTCON*8+2;//TMR0溢出中止标志位。0：无溢出；1：溢出。
static volatile bitINTF@ (unsigned)&INTCON*8+1;//RB0/INT外部中止标志位。0：RB0外部中止未产生；1：RB0外部中止产生。
static volatile bitRBIF@ (unsigned)&INTCON*8+0;//RB端口改动中止标志位。0：RB口无改动；1：RB口至少有一个引脚改动。
// alternate definitions
static volatile bitTMR0IE@ (unsigned)&INTCON*8+5;//
static volatile bitTMR0IF@ (unsigned)&INTCON*8+2;//
//*PIR1 bits中止标志寄存器PIR1*/
#ifdef__PINS_40
static volatile bitPSPIF@ (unsigned)&PIR1*8+7;//并行从端口读写中止标志位。0：没有读写操作产生；1：反之
#endif
static volatile bitADIF@ (unsigned)&PIR1*8+6;//A/D转化器中止标志位。0：A/D转化没有完结；1：A/D转化完结。
static volatile bitRCIF@ (unsigned)&PIR1*8+5;//USART接纳中止标志位。0：接纳缓冲器空；1：反之。
static volatile bitTXIF@ (unsigned)&PIR1*8+4;//USART发送中止标志位。0：产生缓冲器满；1：反之。
static volatile bitSSPIF@ (unsigned)&PIR1*8+3;//同步串行端口（ssp）中止标志位。0：没有ssp中止条件产生；
static volatile bitCCP1IF@ (unsigned)&PIR1*8+2;//CCP1中止标志位。
static volatile bitTMR2IF@ (unsigned)&PIR1*8+1;//TMR2 TO PR2匹配中止标志位。0：没有匹配产生
static volatile bitTMR1IF@ (unsigned)&PIR1*8+0;//TMR1溢出中止标志位，0：无溢出
/*PIR2 bits*/
static volatile bitCMIF@ (unsigned)&PIR2*8+6;//比较器中止标志位；0：比较器输入没有改动
static volatile bitEEIF@ (unsigned)&PIR2*8+4;//EEPROM写操作中止标志位。0：写操作没有完结或没有开端
static volatile bitBCLIF@ (unsigned)&PIR2*8+3;//总线抵触中止标志位。0：没有总线抵触产生
static volatile bitCCP2IF@ (unsigned)&PIR2*8+0;//CCP2中止标志位
//*T1CON bitsTMR1操控寄存器*/
static volatile bitT1CKPS1@ (unsigned)&T1CON*8+5;//TMR1输入时钟预分频挑选位
static volatile bitT1CKPS0@ (unsigned)&T1CON*8+4;//TMR1输入时钟预分频挑选位
static volatile bitT1OSCEN@ (unsigned)&T1CON*8+3;//TMR1震动器使能操控位。0：振荡器封闭
static volatile bitT1SYNC @ (unsigned)&T1CON*8+2;//TMR1外部时钟输入同步操控位。
static volatile bitTMR1CS @ (unsigned)&T1CON*8+1;//TMR1时钟源挑选位。0：内部时钟的/4
static volatile bitTMR1ON @ (unsigned)&T1CON*8+0;//TMR1使能位。0：制止
//*T2CON bits TMR2操控寄存器*/
static volatile bitTOUTPS3@ (unsigned)&T2CON*8+6;//TMR2后分频挑选位。
static volatile bitTOUTPS2@ (unsigned)&T2CON*8+5;//TMR2后分频挑选位
static volatile bitTOUTPS1@ (unsigned)&T2CON*8+4;//TMR2后分频挑选位
static volatile bitTOUTPS0@ (unsigned)&T2CON*8+3;//TMR2后分频挑选位。
static volatile bitTMR2ON @ (unsigned)&T2CON*8+2;//TMR2使能位。
static volatile bitT2CKPS1@ (unsigned)&T2CON*8+1;//TMR2预分频挑选位。
static volatile bitT2CKPS0@ (unsigned)&T2CON*8+0;//TMR2预分频挑选位
//*SSPCON bitsSPI同步串口操控寄存器*/
static volatile bitWCOL@ (unsigned)&SSPCON*8+7;//写操作抵触检测位，在SPI从动方法下，WCOL=0，未产生抵触，WCOL=1,产生抵触。
static volatile bitSSPOV@ (unsigned)&SSPCON*8+6;//接纳溢出标志位，SSPOV=0，未产生接纳溢出；SSPOV=1,产生承受溢出。
static volatile bitSSPEN@ (unsigned)&SSPCON*8+5;//同步串口MSSP答应位，SSPEN=0，封闭串口；SSPEN=1，答应串行端口功用。
static volatile bitCKP@ (unsigned)&SSPCON*8+4;//时钟极性挑选位，CKP=0，闲暇时时钟停留在低电平；CKP=1，闲暇时时钟停留在高电平。
static volatile bitSSPM3@ (unsigned)&SSPCON*8+3;//同步串行口MSSP方法挑选位，自动参数。0，1，2，3，4.
static volatile bitSSPM2@ (unsigned)&SSPCON*8+2;
static volatile bitSSPM1@ (unsigned)&SSPCON*8+1;
static volatile bitSSPM0@ (unsigned)&SSPCON*8+0;
/*CCP1CON bits*/
static volatile bitCCP1X@ (unsigned)&CCP1CON*8+5;//PWM最小信号位
static volatile bitCCP1Y@ (unsigned)&CCP1CON*8+4;//PWM最小信号位
static volatile bitCCP1M3@ (unsigned)&CCP1CON*8+3;//CCP1形式挑选位
static volatile bitCCP1M2@ (unsigned)&CCP1CON*8+2;//CCP1形式挑选位
static volatile bitCCP1M1@ (unsigned)&CCP1CON*8+1;//CCP1形式挑选位
static volatile bitCCP1M0@ (unsigned)&CCP1CON*8+0;//CCP1形式挑选位
//*RCSTA bitsUSART接纳操控兼状况寄存器 */
static volatile bitSPEN@ (unsigned)&RCSTA*8+7;//串行端口使能位。0：制止；1：使能。
static volatile bitRX9 @ (unsigned)&RCSTA*8+6;//接纳数据长度挑选位。0：接纳8位数据；1：接纳9位
static volatile bitSREN@ (unsigned)&RCSTA*8+5;//单字节使能挑选位。0：制止；1：使能。异步形式未运用
static volatile bitCREN@ (unsigned)&RCSTA*8+4;//接连接纳使能挑选位。0：制止接连接纳使能
static volatile bitADDEN@ (unsigned)&RCSTA*8+3;//地址匹配检测使能位。0：撤销地址匹配检测
static volatile bitFERR@ (unsigned)&RCSTA*8+2;//帧格局过错标志位。0：未产生过错
static volatile bitOERR@ (unsigned)&RCSTA*8+1;//溢出标志位。0：未溢出
static volatile bitRX9D@ (unsigned)&RCSTA*8+0;//接纳数据的第9位
/*CCP2CON bits*/
static volatile bitCCP2X@ (unsigned)&CCP2CON*8+5;//PWM最小信号位
static volatile bitCCP2Y@ (unsigned)&CCP2CON*8+4;//PWM最小信号位
static volatile bitCCP2M3@ (unsigned)&CCP2CON*8+3;//CCP2形式挑选位
static volatile bitCCP2M2@ (unsigned)&CCP2CON*8+2;//CCP2形式挑选位
static volatile bitCCP2M1@ (unsigned)&CCP2CON*8+1;//CCP2形式挑选位
static volatile bitCCP2M0@ (unsigned)&CCP2CON*8+0;//CCP2形式挑选位
//* ADCON0 bitsA/D操控寄存器位 */
static volatile bitADCS1@ (unsigned)&ADCON0*8+7;//挑选A/D转化时钟。00：1/2;01:1/8;10:1/32;11:RC
static volatile bitADCS0 @ (unsigned)&ADCON0*8+6;//挑选A/D转化时钟
static volatile bitCHS2@ (unsigned)&ADCON0*8+5;//AD模仿通道挑选
static volatile bitCHS1@ (unsigned)&ADCON0*8+4;//AD模仿通道挑选
static volatile bitCHS0@ (unsigned)&ADCON0*8+3;//AD模仿通道挑选。000：挑选信道0.
static volatile bitADGO@ (unsigned)&ADCON0*8+2;//A/D转化状况位,ADON=1时，0：不在进行ad转化；1：正在进行转化。
static volatile bitADON@ (unsigned)&ADCON0*8+0;//A/D转化器开关位，0：封闭；1：发动。
//* OPTION bits 挑选寄存器 */
static bank1 bitRBPU@ (unsigned)&OPTION*8+7;//端口B上拉设置答应位
static bank1 bitINTEDG@ (unsigned)&OPTION*8+6;//外中止源挑选位
static bank1 bitT0CS@ (unsigned)&OPTION*8+5;//时钟挑选位。T0CS=0，运用内部时钟；T0CS=1，运用外部时钟。
static bank1 bitT0SE@ (unsigned)&OPTION*8+4;//计数器运用外部时钟，T0SE=0，上升沿触发；T0SE=1，下降沿触发。
static bank1 bitPSA@ (unsigned)&OPTION*8+3;//PSA=0，作为time0的预分频器；PSA=1，作为WDT的后分频器。
static bank1 bitPS2@ (unsigned)&OPTION*8+2;//PS2,PS1,PS0。预分频份额。000=1：2（Timer0)1:1(WDT)…
static bank1 bitPS1@ (unsigned)&OPTION*8+1;//
static bank1 bitPS0@ (unsigned)&OPTION*8+0;//
//* TRISA bits PORTA数据方向寄存器 */
static volatile bank1 bitTRISA5@ (unsigned)&TRISA*8+5;//
static volatile bank1 bitTRISA4@ (unsigned)&TRISA*8+4;//
static volatile bank1 bitTRISA3@ (unsigned)&TRISA*8+3;//
static volatile bank1 bitTRISA2@ (unsigned)&TRISA*8+2;//
static volatile bank1 bitTRISA1@ (unsigned)&TRISA*8+1;//
static volatile bank1 bitTRISA0@ (unsigned)&TRISA*8+0;//
//* TRISB bits PORTB数据方向寄存器 */
static volatile bank1 bitTRISB7@ (unsigned)&TRISB*8+7;//
static volatile bank1 bitTRISB6@ (unsigned)&TRISB*8+6;//
static volatile bank1 bitTRISB5@ (unsigned)&TRISB*8+5;//
static volatile bank1 bitTRISB4@ (unsigned)&TRISB*8+4;//
static volatile bank1 bitTRISB3@ (unsigned)&TRISB*8+3;//
static volatile bank1 bitTRISB2@ (unsigned)&TRISB*8+2;//
static volatile bank1 bitTRISB1@ (unsigned)&TRISB*8+1;//
static volatile bank1 bitTRISB0@ (unsigned)&TRISB*8+0;//
//* TRISC bits PORTC数据方向寄存器 */
static volatile bank1 bitTRISC7@ (unsigned)&TRISC*8+7;//
static volatile bank1 bitTRISC6@ (unsigned)&TRISC*8+6;//
static volatile bank1 bitTRISC5@ (unsigned)&TRISC*8+5;//
static volatile bank1 bitTRISC4@ (unsigned)&TRISC*8+4;//
static volatile bank1 bitTRISC3@ (unsigned)&TRISC*8+3;//
static volatile bank1 bitTRISC2@ (unsigned)&TRISC*8+2;//
static volatile bank1 bitTRISC1@ (unsigned)&TRISC*8+1;//
static volatile bank1 bitTRISC0@ (unsigned)&TRISC*8+0;//
#ifdef__PINS_40
//* TRISD bits PORTD数据方向寄存器 */
static volatile bank1 bitTRISD7@ (unsigned)&TRISD*8+7;//
static volatile bank1 bitTRISD6@ (unsigned)&TRISD*8+6;//
static volatile bank1 bitTRISD5@ (unsigned)&TRISD*8+5;//
static volatile bank1 bitTRISD4@ (unsigned)&TRISD*8+4;//
static volatile bank1 bitTRISD3@ (unsigned)&TRISD*8+3;//
static volatile bank1 bitTRISD2@ (unsigned)&TRISD*8+2;//
static volatile bank1 bitTRISD1@ (unsigned)&TRISD*8+1;//
static volatile bank1 bitTRISD0@ (unsigned)&TRISD*8+0;//
//* TRISE bits PORTE数据方向寄存器 */
static volatile bank1 bitIBF@ (unsigned)&TRISE*8+7;//
static volatile bank1 bitOBF@ (unsigned)&TRISE*8+6;//
static volatile bank1 bitIBOV@ (unsigned)&TRISE*8+5;//
static volatile bank1 bitPSPMODE@ (unsigned)&TRISE*8+4;//
static volatile bank1 bitTRISE2 @ (unsigned)&TRISE*8+2;//
static volatile bank1 bitTRISE1 @ (unsigned)&TRISE*8+1;//
static volatile bank1 bitTRISE0 @ (unsigned)&TRISE*8+0;//
#endif
//*PIE1 bits 外围中止独立使能位*/
#ifdef__PINS_40
static volatile bank1 bitPSPIE@ (unsigned)&PIE1*8+7;//并行从端口读写中止使能位。0：制止psp读写中止
#endif
static volatile bank1 bitADIE@ (unsigned)&PIE1*8+6;//A/D转化器中止标志位。0：A/D转化没有完结；1：A/D转化完结。
static volatile bank1 bitRCIE@ (unsigned)&PIE1*8+5;//USART接纳中止标志位。0：接纳缓冲器空；1：反之。
static volatile bank1 bitTXIE@ (unsigned)&PIE1*8+4;////USART发送中止标志位。0：产生缓冲器满；1：反之。
static volatile bank1 bitSSPIE@ (unsigned)&PIE1*8+3;//同步串行端口中止使能位
static volatile bank1 bitCCP1IE@ (unsigned)&PIE1*8+2;//CCP1中止使能位
static volatile bank1 bitTMR2IE@ (unsigned)&PIE1*8+1;//TMR2 TO PR2匹配中止标志位。0：没有匹配产生
static volatile bank1 bitTMR1IE@ (unsigned)&PIE1*8+0;//TMR1溢出中止标志位，0：无溢出
/*PIE2 bits*/
static volatile bank1 bitCMIE@ (unsigned)&PIE2*8+6;//比较器中止使能位
static volatile bank1 bitEEIE@ (unsigned)&PIE2*8+4;//EEPROM写操作中止使能位
static volatile bank1 bitBCLIE@ (unsigned)&PIE2*8+3;//总线抵触中止使能位
static volatile bank1 bitCCP2IE@ (unsigned)&PIE2*8+0;//CCP2中止使能位
//*PCON bits 电源操控寄存器*/
static volatile bank1 bitPOR@ (unsigned)&PCON*8+1;//上电复位状况位
static volatile bank1 bitBOR@ (unsigned)&PCON*8+0;//掉电复位状况位
//*SSPCON2 bits MSSP操控寄存器2*/
static volatile bank1 bitGCEN@ (unsigned)&SSPCON2*8+7;//总调用使能位
static volatile bank1 bitACKSTAT@ (unsigned)&SSPCON2*8+6;//应对状况位
static volatile bank1 bitACKDT@ (unsigned)&SSPCON2*8+5;//应对数据位
static volatile bank1 bitACKEN@ (unsigned)&SSPCON2*8+4;//应对次序使能位
static volatile bank1 bitRCEN@ (unsigned)&SSPCON2*8+3;//接纳使能位
static volatile bank1 bitPEN@ (unsigned)&SSPCON2*8+2;//中止条件使能位
static volatile bank1 bitRSEN@ (unsigned)&SSPCON2*8+1;//重复开端条件使能位
static volatile bank1 bitSEN@ (unsigned)&SSPCON2*8+0;//开端条件使能位
//* SSPSTAT bits SPI同步串口状况寄存器 */
static volatile bank1 bitSTAT_SMP@ (unsigned)&SSPSTAT*8+7;//SPI采样操控位。SPI主控方法，STAT_SMP=0,在输出的数据中心采样输入数据，为1时，在结尾采样；SPI从动方法，STAT_SMP有必要置位。
static volatile bank1 bitSTAT_CKE@ (unsigned)&SSPSTAT*8+6;//SPI时钟沿挑选,CKP=0时，STAT_CKE=0,SCK下降沿发送数据，STAT_CKE=1,SCK上升沿发送数据。CKP=1时，反之。
static volatile bank1 bitSTAT_DA@ (unsigned)&SSPSTAT*8+5;//数据/地址位
static volatile bank1 bitSTAT_P@ (unsigned)&SSPSTAT*8+4;//中止位
static volatile bank1 bitSTAT_S@ (unsigned)&SSPSTAT*8+3;//开端位
static volatile bank1 bitSTAT_RW@ (unsigned)&SSPSTAT*8+2;//读写位信息
static volatile bank1 bitSTAT_UA@ (unsigned)&SSPSTAT*8+1;//更新地址位
static volatile bank1 bitSTAT_BF@ (unsigned)&SSPSTAT*8+0;//缓冲器满标志位。STAT_BF=0，缓冲器空；STAT_BF=1，缓冲器满。
//*TXSTA bitsUSART发送操控兼状况寄存器*/
static volatile bank1 bitCSRC@ (unsigned)&TXSTA*8+7;//同步时钟挑选位。0：选外部时钟；1：选内部时钟。异步形式未用。
static volatile bank1 bitTX9@ (unsigned)&TXSTA*8+6;//产生长度挑选位。0：发送8位数据；1：发送9位
static volatile bank1 bitTXEN@ (unsigned)&TXSTA*8+5;//产生使能挑选位。0：制止发送；1：使能产生
static volatile bank1 bitSYNC@ (unsigned)&TXSTA*8+4;//同步/异步形式挑选位。0：异步；1：同步
static volatile bank1 bitBRGH@ (unsigned)&TXSTA*8+2;//高速波特率挑选位。0：低速；1：高速。
static volatile bank1 bitTRMT@ (unsigned)&TXSTA*8+1;//移位寄存器空标志位。0，产生移位寄存器满，1，为空。
static volatile bank1 bitTX9D@ (unsigned)&TXSTA*8+0;//产生第9位的挑选位，0,不产生，1，发送。
//*CMCON Bits 比较器操控寄存器*/
static volatile bank1 bitC2OUT@ (unsigned)&CMCON*8+7;//比较器2输出位
static volatile bank1 bitC1OUT@ (unsigned)&CMCON*8+6;//比较器1输出位
static volatile bank1 bitC2INV@ (unsigned)&CMCON*8+5;//比较器3输出反向位
static volatile bank1 bitC1INV@ (unsigned)&CMCON*8+4;//比较器1输出反向位
static volatile bank1 bitCIS@ (unsigned)&CMCON*8+3;//比较器输入开关位
static volatile bank1 bitCM2@ (unsigned)&CMCON*8+2;//比较器形式位
static volatile bank1 bitCM1@ (unsigned)&CMCON*8+1;//比较器形式位
static volatile bank1 bitCM0@ (unsigned)&CMCON*8+0;//比较器形式位
//*CVRCON Bits 比较电压参阅寄存器*/
static volatile bank1 bitCVREN@ (unsigned)&CVRCON*8+7;//比较器电压参阅使能位
static volatile bank1 bitCVROE@ (unsigned)&CVRCON*8+6;//比较器Vref输出使能位
static volatile bank1 bitCVRR@ (unsigned)&CVRCON*8+5;//比较器Vref规模挑选位
static volatile bank1 bitCVR3@ (unsigned)&CVRCON*8+3;//比较器Vref值挑选位
static volatile bank1 bitCVR2@ (unsigned)&CVRCON*8+2;//比较器Vref值挑选位
static volatile bank1 bitCVR1@ (unsigned)&CVRCON*8+1;//比较器Vref值挑选位
static volatile bank1 bitCVR0@ (unsigned)&CVRCON*8+0;//比较器Vref值挑选位
//*ADCON1 bitsADC操控寄存器ADCON1*/
static volatile bank1 bitADFM@ (unsigned)&ADCON1*8+7;//AD转化成果格局挑选位
static volatile bank1 bitADCS2@ (unsigned)&ADCON1*8+6;//AD转化时钟挑选位
static volatile bank1 bitPCFG3@ (unsigned)&ADCON1*8+3;//PCFG3-PCFG0AD转化引脚功用挑选位。具体含义见手册PAGE-130.
static volatile bank1 bitPCFG2@ (unsigned)&ADCON1*8+2;
static volatile bank1 bitPCFG1@ (unsigned)&ADCON1*8+1;
static volatile bank1 bitPCFG0@ (unsigned)&ADCON1*8+0;
//*EECON1 bits EEPROM操控寄存器*/
static volatile bank3 bitEEPGD@ (unsigned)&EECON1*8+7;//程序/数据EEPROM挑选位。0：挑选拜访数据存储器
static volatile bank3 bitWRERR@ (unsigned)&EECON1*8+3;//EEPROM过错标志位。0：写操作完结
static volatile bank3 bitWREN@ (unsigned)&EECON1*8+2;//EEPROM写使能位。1：答应
static volatile bank3 bitWR@ (unsigned)&EECON1*8+1;//写操控位
static volatile bank3 bitRD@ (unsigned)&EECON1*8+0;//读操控位
#define CONFIG_ADDR0x2007
/*osc configurations*/
#define RC0x3FFF// resistor/capacitor RC振荡器
#define HS0x3FFE// high speed crystal/resonator
#define XT0x3FFD// crystal/resonator
#define LP0x3FFC// low power crystal/resonator
/*watchdog*/
#define WDTEN0x3FFF// enable watchdog timer
#define WDTDIS0x3FFB// disable watchdog timer
/*power up timer*/
#define PWRTEN0x3FF7// enable power up timer
#define PWRTDIS0x3FFF// disable power up timer
/*brown out reset*/
#define BOREN0x3FFF// enable brown out reset
#define BORDIS0x3FBF// disable brown out reset
/*Low Voltage Programmable*/
#define LVPEN0x3FFF// low voltage programming enabled
#define LVPDIS0x3F7F// low voltage programming disabled
/*data code protected*/
#define DP0x3EFF// protect data code
// alternately
#define DPROT0x3EFF// use DP
#define DUNPROT0x3FFF// use UNPROTECT
/* Flash memory write enable/protect */
#define WRTEN0x3FFF/* flash memory write enabled */
#define WP10x3DFF /* protect 0000 – 00FF */
#define WP20x3BFF /* protect 0000 – 07FF(76A/77A) / 03FF(73A/74A) */
#define WP30x39FF /* protect 0000 – 1FFF(76A/77A) / 0FFF(73A/74A) */
/*debug option*/
#define DEBUGEN0x37FF// debugger enabled
#define DEBUGDIS0x3FFF// debugger disabled
/*code protection*/
#define PROTECT0x1FFF/* protect program code */
#define UNPROTECT0x3FFF/* do not protect the code */
