跟着印制电路板(PCB)集成度的进步，寄生参数会损坏PCB电源分配网络(PDN)的稳定性[1]，PDN的阻抗ZPDN会发生尖峰（反谐振点），参阅文献[2]经过去耦电容削弱ZPDN的尖峰并将其推移至PCB的非作业频段，指出了并联去耦电容的等效特性阻抗会发生反谐振点，且该点不可以大于方针阻抗。参阅文献[3]总结了各种电容器跟着频率升高，其特性阻抗、有用容值受寄生电阻的影响；参阅文献[4]是从场视点研讨电容特性阻抗与寄生参数的联系，参阅文献[5]选用运算放大器来添加电容的有用容值。以上文献都均未给出寄生参数和去耦电容特性阻抗反谐振点联系的完好模型。
参阅文献[6]详细描述了单个电容寄生参数与特性阻抗之间的联系；参阅文献[7-8]从等效电路视点核算出了ZPDN尖峰的频率方位；参阅文献[9]将PDN等效为微波网络核算出了ZPDN尖峰的频率方位；上述文献中，仅给出了寄生参数改变对反谐振点的影响的仿真图形，并没有给出相应数学模型。
本文主要在参阅文献[6，8]的基础上，推导并验证了并联电容特性阻抗反谐振点与电容寄生参数的数学模型，即合理选取最佳去耦电容来尽可能压低反谐振点的阻抗，然后在Cadence开发环境中施行了该办法，从而在选取去耦电容器这一环节上给出了重要的理论参阅。
1 电容特性阻抗剖析
图1为并联电容的等效电路模型[7]，阻抗为：
本文从并联电容的等效电路模型动身，推导出电容参数与反谐振点频率、反谐振点起伏的数学模型，然后将此模型应用到根据方针阻抗的规划中。经过简略核算，验证了电容组选取的合理性。此办法简略直观，为高速电路规划人员在挑选去耦%&&&&&%时供给了有价值的参阅。
参阅文献
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